8-bit Harvard CPU in ABEL
Fully implemented an 8-bit Harvard architecture CPU using Advanced Boolean Expression Language for EE/CS10 @ Caltech. Built 16-bit instruction register w/decoding logic + state machine for multi-cycle instructions.
Fully implemented an 8-bit Harvard architecture CPU using Advanced Boolean Expression Language for EE/CS10 @ Caltech. Built 16-bit instruction register w/decoding logic + state machine for multi-cycle instructions.